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<p>This typedef contains configuration information for the I2s Transmitter.  
 <a href="struct_x_i2stx___config.html#details">More...</a></p>
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Data Fields</h2></td></tr>
<tr class="memitem:a1cc38afcbc4c3273e97aca5b75d50641"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_i2stx___config.html#a1cc38afcbc4c3273e97aca5b75d50641">DeviceId</a></td></tr>
<tr class="memdesc:a1cc38afcbc4c3273e97aca5b75d50641"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unique ID of device.  <a href="#a1cc38afcbc4c3273e97aca5b75d50641">More...</a><br/></td></tr>
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<tr class="memitem:af68feefd4d9c6ccefa84679124e68735"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_i2stx___config.html#af68feefd4d9c6ccefa84679124e68735">BaseAddress</a></td></tr>
<tr class="memdesc:af68feefd4d9c6ccefa84679124e68735"><td class="mdescLeft">&#160;</td><td class="mdescRight">BaseAddress is physical address of registers.  <a href="#af68feefd4d9c6ccefa84679124e68735">More...</a><br/></td></tr>
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<tr class="memitem:a3490395f577210a6eddf197e4466923a"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_i2stx___config.html#a3490395f577210a6eddf197e4466923a">DWidth</a></td></tr>
<tr class="memdesc:a3490395f577210a6eddf197e4466923a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Width (16/24bit) of I2s Tx core.  <a href="#a3490395f577210a6eddf197e4466923a">More...</a><br/></td></tr>
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<tr class="memitem:a859e555af49b28a0fc21cc78001654e5"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_i2stx___config.html#a859e555af49b28a0fc21cc78001654e5">IsMaster</a></td></tr>
<tr class="memdesc:a859e555af49b28a0fc21cc78001654e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">IsMaster(TRUE/FALSE) for I2s Tx core.  <a href="#a859e555af49b28a0fc21cc78001654e5">More...</a><br/></td></tr>
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<tr class="memitem:a43a22f65a31208715277ffd61dc2d3fe"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_i2stx___config.html#a43a22f65a31208715277ffd61dc2d3fe">MaxNumChannels</a></td></tr>
<tr class="memdesc:a43a22f65a31208715277ffd61dc2d3fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max channels supported by I2s Tx core.  <a href="#a43a22f65a31208715277ffd61dc2d3fe">More...</a><br/></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This typedef contains configuration information for the I2s Transmitter. </p>
</div><h2 class="groupheader">Field Documentation</h2>
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<p>BaseAddress is physical address of registers. </p>

<p>Referenced by <a class="el" href="xi2stx__selftest__example_8c.html#a3b48b73e19976c8d41c321471431f674">I2sSelfTestExample()</a>, <a class="el" href="xi2stx__intr__example_8c.html#a1d16f81e40091da2c2bf4b76f0a5adab">I2sTxIntrExample()</a>, <a class="el" href="group__i2stx.html#gab33cb9b421dbb85cef8a75a0dbf8a1dd">XI2s_Tx_CfgInitialize()</a>, <a class="el" href="group__i2stx.html#gac4321c85028de0ddb48f966d80325b10">XI2s_Tx_Enable()</a>, <a class="el" href="group__i2stx.html#gab68c1f16ccac1a678e93bd9c3bcdaed0">XI2s_Tx_GetAesChStatus()</a>, <a class="el" href="group__i2stx.html#gab8f9b6a032bcb91ac82b9552f1ba3194">XI2s_Tx_IntrDisable()</a>, <a class="el" href="group__i2stx.html#ga8d2df1eb8affcff7f6b1eacad5016b39">XI2s_Tx_IntrEnable()</a>, <a class="el" href="group__i2stx.html#gad17911935c47159f6b1c144c3df63ce2">XI2s_Tx_IntrHandler()</a>, <a class="el" href="group__i2stx.html#gab101d38c979a17b2bd4540a3b418933d">XI2s_Tx_Justify()</a>, <a class="el" href="group__i2stx.html#gae5c7f651728493e9ca5a13d824f47893">XI2s_Tx_JustifyEnable()</a>, <a class="el" href="group__i2stx.html#ga6ecb01665e82e3373ad2de2085a8dc87">XI2s_Tx_LogDisplay()</a>, <a class="el" href="group__i2stx.html#ga265a3458a6fd3232bba3df9f9341e3cd">XI2s_Tx_SetChMux()</a>, and <a class="el" href="group__i2stx.html#gacdd2c6678f1038ca76099cbcaebe1fde">XI2s_Tx_SetSclkOutDiv()</a>.</p>

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<p>Unique ID of device. </p>

<p>Referenced by <a class="el" href="group__i2stx.html#ga6ecb01665e82e3373ad2de2085a8dc87">XI2s_Tx_LogDisplay()</a>.</p>

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<p>Data Width (16/24bit) of I2s Tx core. </p>

<p>Referenced by <a class="el" href="group__i2stx.html#gacdd2c6678f1038ca76099cbcaebe1fde">XI2s_Tx_SetSclkOutDiv()</a>.</p>

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<p>IsMaster(TRUE/FALSE) for I2s Tx core. </p>

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<p>Max channels supported by I2s Tx core. </p>

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